1. Field
Example embodiments relate to a chip stack package and a method of fabricating the same, and more particularly, to a chip stack package formed by stacking a plurality of chips and a method of fabricating the same.
2. Description of the Related Art
Developments in semiconductor industries are in a trend toward low-cost fabrication of multi-functional products that are relatively light, small, fast, efficient, and reliable. Different packaging techniques offer one of the most significant ways to achieve the above-stated goal.
A packaging technique may produce a chip stack package that is formed by stacking a plurality of chips. Because chips are stacked in a chip stack package, density of chip integration may be increased. Furthermore, because different types of chips, e.g., a memory chip and a control chip, may be stacked in a chip stack package, a chip stack package may be used as a system-in package.
A chip stack package may be formed by stacking a plurality of chips on a printed circuit board (PCB) substrate. However, reducing the thickness of a chip stack package that includes a PCB substrate may be difficult due to the thickness of the PCB substrate. Furthermore, it is difficult to reduce cost of fabricating a chip stack package that includes a PCB substrate due to the price of the PCB substrate. Furthermore, in cases where a PCB substrate is defective, a chip stack package using the defective PCB substrate becomes defective even if chips are not defective.
Furthermore, a chip stack package formed by stacking chips on a PCB substrate exhibits performance deterioration due to relatively long lengths of wirings in the PCB substrate and a relatively high moisture absorption rate of the PCB substrate.